工作职责：

1. Responsible for ADC architecture design and specification definition according to the system requirements 2. Responsible for the design, simulation and optimization of ADC and other analog circuits 3. Guide layout engineer to optimize layout 4. Product test and debug 5. IP and design documentations

任职资格：

1. MSEE with 5+ years working experience 2. Familiar with basic analog circuit design and analysis, such as op-amp, bandgap reference, comparator, etc. 3. Experience in ADC design, including but not limited to SAR ADC, pipelined/SAR ADC, Hybrid ADCs 4. Familiar with EDA tools such as hspice/virtuoso, able to use matlab/verilog to complete modeling 5. Basic knowledge of layout/process