工作职责：

1. Implement RTL design for FPGA.
2. Develop firmware.
3. Design hardware circuit according the requirement (include high speed system board design).
4. Test and debug hardware circuit.
5. Writing design documents.

任职资格：

Education Major: Electrical/electronic engineering
1. MSEE/CE, 3 years+ working experience in FPGA design and system design.
2. At least 5+ year experience with FPGA development, good knowledge of RTL design and simulation.
3. At least 5+ year experience with hardware system design and debug.
4. Understand on image processing.
5. Experience with Cadence layout is a plus.
6. Good planning skills and communication skills.